Zilog Z08470 Manual de usuario descargar pdf (Pagina 148)

Z80 Instruction Set UM008007-0715

136

Z80 CPU

User Manual

CPI

Operation

A – (HL), HL ← HL +1, BC ← BC – 1

Op Code

CPI

Operands

None.

Description

The contents of the memory location addressed by the HL register is compared with the

contents of the Accumulator. With a true compare, a condition bit is set. Then HL is incre-

mented and the Byte Counter (register pair BC) is decremented.

Condition Bits Affected

S is set if result is negative; otherwise, it is reset.

Z is set if A is (HL); otherwise, it is reset.

H is set if borrow from bit 4; otherwise, it is reset.

P/V is set if BC – 1 is not 0; otherwise, it is reset.

N is set.

C is not affected.

Example

If the HL register pair contains 1111h, memory location 1111h contains 3Bh, the Accu-

mulator contains

3Bh, and the Byte Counter contains 0001h. Upon the execution of a CPI

instruction, the Byte Counter contains

0000h, the HL register pair contains 1112h, the Z

flag in the F register is set, and the P/V flag in the F Register is reset. There is no effect on

the contents of the Accumulator or to address

1111h.

M Cycles T States 4 MHz E.T.

4 16 (4, 4, 3, 5) 4.00

11 0 01111

10 0 00010

1 2 ... 143 144 145 146 147 148 149 150 151 152 153 ... 325 326

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Zilog Z08470 Manual de usuario Pagina 148