
Z80 Instruction Set UM008007-0715
150
Z80 CPU
User Manual
r identifies registers B, C, D, E, H, L, or A, assembled as follows in the object code field:
Description
The s operand, along with the Carry Flag (C in the F Register) is added to the contents of
the Accumulator, and the result is stored in the Accumulator.
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if result is 0; otherwise, it is reset.
H is set if carry from bit 3; otherwise, it is reset.
P/V is set if overflow; otherwise, it is reset.
N is reset.
C is set if carry from bit 7: otherwise, it is reset.
Example
If the Accumulator contents are 16h, the Carry Flag is set, the HL register pair contains
6666h, and address 6666h contains 10h, then upon the execution of an ADC A, (HL)
instruction, the Accumulator contains
27h.
Register r
B 000
C 001
D 010
E 011
H 100
L 101
A 111
Instruction M Cycle T States 4 MHz E.T.
ADC A, r 1 4 1.00
ADC A, n 2 7 (4, 3) 1.75
ADC A, (HL) 2 7 (4, 3) 1.75
ADC A, (IX+d) 5 19 (4, 4, 3, 5, 3) 4.75
ADC A, (lY+d) 5 19 (4, 4, 3, 5, 3) 4.75
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