
Z80 Instruction Set UM008007-0715
152
Z80 CPU
User Manual
r identifies registers B, C, D, E, H, L, or A assembled as follows in the object code field:
Description
The s operand is subtracted from the contents of the Accumulator, and the result is stored
in the Accumulator.
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if result is 0; otherwise, it is reset.
H is set if borrow from bit 4; otherwise, it is reset.
P/V is set if overflow; otherwise, it is reset.
N is set.
C is set if borrow; otherwise, it is reset.
Example
If the Accumulator contents are 29h, and the D Register contains 11h, then upon the exe-
cution of a SUB D instruction, the Accumulator contains
18h.
Register r
B 000
C 001
D 010
E 011
H 100
L 101
A 111
Instruction M Cycle T States 4 MHz E.T.
SUB r 1 4 1.00
SUB n 2 7 (4, 3) 1.75
SUB (HL) 2 7 (4, 3) 1.75
SUB (IX+d) 5 19 (4, 4, 3, 5, 3) 4.75
SUB (lY+d) 5 19 (4, 4, 3, 5, 3) 4.75
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