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UM018809-0611 INC Instruction
ZNEO
®
CPU Core
User Manual
109
Examples
Before:
R3=FFFF_B024H, FFFF_B02CH=702EH
INC.W 8(R3) ;Object Code: ADE3 4008
After:
FFFF_B02CH=702FH, Flags C, S, Z, V, B=0
Before: FFFF_B034H=2EH
INC.B B034H:RAM ;Object Code: ADA2 B034
After:
FFFF_B034H = 2FH, Flags C, Z, S, V, B =0
INC soff14(Rd) {ADEH, Rd} {1xB, soff14}
INC.W addr16 ADA6H addr16
INC.W addr32 ADB6H addr[31:16] addr[15:0]
INC.W (Rd) {AC6H, Rd}
INC.W soff14(Rd) {ADEH, Rd} {01B, soff14}
INC.B addr16 ADA2H addr16
INC.B addr32 ADB2H addr[31:16] addr[15:0]
INC.B (Rd) {AC2H, Rd}
INC.B soff14(Rd) {ADEH, Rd} {00B, soff14}
1
The ZNEO CPU assembler uses an ADD opcode to implement INC Rd.
Instruction, Operands Word 0 Word 1 Word 2
- CPU Core 1
- UM018809-0611 2
- Revision History 3
- Table of Contents 5
- List of Figures 9
- CPU Core 10
- User Manual 10
- List of Tables 11
- Manual Objectives 13
- Manual Conventions 14
- Bit Numbering 15
- Brackets 15
- Safeguards 16
- Architectural Overview 17
- Program Control 18
- Processor Block Diagram 18
- Fetch Unit 19
- Execution Unit 20
- Instruction Cycle Time 21
- Execution Cycles 22
- Control Registers 24
- Stack Pointer Overflow 25
- Flags Register (FLAGS) 25
- Carry Flag 26
- Zero Flag 26
- Sign Flag 26
- Overflow Flag 26
- Blank Flag 27
- User Flag 27
- Master Interrupt Enable Flag 27
- Condition Codes 27
- CPU Control Register (CPUCTL) 29
- Address Space 31
- Memory Map 32
- Internal Nonvolatile Memory 33
- Internal RAM 33
- I/O Memory 34
- External Memory 34
- Endianness 35
- Bus Widths 35
- LOOP: SUB R5, R7 ;Subtract 37
- ZNEO CPU Instruction Classes 38
- Operand Addressing 43
- Immediate Data 44
- Register Addressing 44
- Direct Memory Addressing 45
- Memory Data Size 46
- Resizing Data 47
- LD.UB R10, 4(R12) 48
- LD.UB R10,4(R12) 49
- Using the Stack Pointer (R15) 52
- Bit Manipulation 53
- Setting Bits (Masked OR) 54
- Testing Bits (TM and TCM) 54
- Jump Addressing 55
- 8 –128 to +127 56
- Interrupts 57
- Interrupt Processing 58
- Polled Interrupts 62
- Interrupts UM018809-0611 64
- System Exceptions 65
- Program Counter Overflow 66
- Stack Overflow 66
- Divide-by-Zero 67
- Divide Overflow 67
- Illegal Instruction 68
- Software Traps 69
- Instruction Opcodes 71
- 0000 0000 0010 dddd 73
- Unsigned/Signed extension 73
- 1111 0000 rrrr rrrr 79
- 1111 0001 rrrr rrrr 79
- 1111 0010 0011 0000 79
- Instruction Set Reference 81
- Miscellaneous Abbreviations 82
- Example Description 83
- R3=16H, R11=20H, Flag C=1 86
- R3=16H, R11=20H, Flag C=0 86
- FFFF_B032H=8BF7_47AFH 99
- FFFF_B032H=0000_0000H 99
- R7=FFFF_B023H, FFFF_B023H=FCH 99
- FFFF_B023H=00H 99
- C, Z, V, B=0 101
- R3=16H, R11=16H, Z=1, C=0 107
- Flags Z=1; C, S, V, B=0 107
- R3=16H, R11=16H, C=1 107
- Flags C, S=1; Z, V, B=0 107
- Flags C, S, B=1; Z, V=0 109
- Flags Z, B=1; C, S, V=0 109
- Flags B=1, C, S, Z, V=0 111
- FFFF_B034H=2EH 113
- R11=xxxx_xx86H 120
- R11=xxxx_xx76H 120
- FP=FFFF_B016H 139
- R11=FFFF_B02BH 139
- R4=0000_0086H, R5=8000_0053H 142
- C=1; Z, V, B=0 144
- No Operation 146
- S=1; Z, V, B=0 164
- R3=16H, R11=20H, C=0 167
- R3=16H, R11=20H, C=1 167
- S, V, B=0 181
- 1. The one-word instruction 186
- R4=FFFF_FFE5H, R5=0000_0005H 197
- Unsigned Multiply 200
- Numerics 207
- Index UM018809-0611 208
- UM018809-0611 Index 209
- Customer Support 215
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