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UM018809-0611 Interrupts

ZNEO

CPU Core

User Manual

Interrupts

Peripherals use an interrupt request (IRQ) signal to get the CPU’s attention when it needs

to perform some action, such as moving peripheral data or exchanging status and control

information.

There are two ways to handle interrupt requests:

Vectored Interrupts

. Asserting the IRQ signal forces the CPU to execute the corresponding

interrupt service routine (ISR). The ISR must end with an Interrupt Return (IRET) instruc-

tion.

Polled Interrupts

. Vectored interrupts are disabled (globally or only for the device), and

the software tests the device’s interrupt request bits periodically. If action is required, the

software uses CALL and RET to invoke the appropriate service routine.

Interrupts are generated by internal peripherals, external devices (through the port pins) or

software. The Interrupt Controller prioritizes and handles individual interrupt requests

before passing them to the ZNEO CPU. The interrupt sources and trigger conditions are

device dependent.

To determine available interrupt sources (internal and external), triggering edge options,

and exact programming details, refer to the ZNEO Product Specification that is specific to

your device.

Vectored Interrupts

Each ZNEO CPU interrupt is assigned an interrupt vector that points to the appropriate

service routine for that interrupt. Vectors are stored in a reserved block of 4-byte memory

quads in the nonvolatile memory space. Each interrupt vector is a 32-bit pointer (service

routine address) stored in a memory quad.

For interrupt vector locations, refer to the ZNEO Product Specification that is specific to

your device.

Interrupt Enable and Disable

Vectored interrupts are globally enabled and disabled by executing the Enable Interrupts

(EI) and Disable Interrupts (DI) instructions, respectively. These instructions affect the

Note:

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Zilog Z16F2810 Manual de usuario Pagina 57