Zilog EZ80F91 Manual de usuario descargar pdf (Pagina 48)

eZ80F91 Development Kit

User Manual

UM014220-0508 eZ80F91 Module

eZ80F91 device (a generic feature of the eZ80

family when it is used in

native mode). The discussion that follows references Figure 11.

Bus contention can occur when two or more devices drive a common bus.

CS0

on the eZ80F91 device drives the Flash CE. Upon accessing Flash

memory, CS0 is driven High a maximum of 8.8 ns after the next rising

edge of the CPU Clock (T6—refer to the External Memory Read Timing

diagram in the eZ80F91 MCU Product Specification (PS0192) for assis-

tance). The Flash turn-off time (T

) is 25 ns—the duration from OE or

CE going High to Flash output drivers in a high-impedance state. For fur-

ther information, refer to MT28F008 data sheet on www.micron.com

Figure 11. Possible Bus Contention without Fast Buffer

Data In Data Out

Bus Contention

CPU Clock

CS0

CS1

eZ80F91 Data Bus

Flash Data Bus

1 2 ... 43 44 45 46 47 48 49 50 51 52 53 ... 77 78

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Zilog EZ80F91 Manual de usuario Pagina 48