Zilog Z80380 Manual de usuario descargar pdf (Pagina 148)

5-114

Z380

™

USER'S MANUAL

DC-8297-03

ZILOG

OTDMR

OUTPUT, DECREMENT MEMORY REPEAT

OTDMR

Operation: repeat until (B=0) begin

C ← C – 1

B ← B – 1

HL ← HL – 1

end

This instruction is used for block output of strings of data to on-chip peripherals. No external

I/O transaction will be generated as a result of this instruction, although the I/O address will

appear on the address bus and the write data will appear on the data bus while this internal

write is occurring. The peripheral address is placed on the low byte of the address bus and

zeros are placed on all other address lines. The byte of data from the memory location

addressed by the HL register is loaded to the on-chip I/O port addressed by the C register.

The C register, holding the port address, is decremented by one to select the next output

port. The B register, used as a counter, is then decremented by one. The HL register is then

decremented by one, thus moving the pointer to the next source for the output. If the result

of decrementing the B register is 0, the instruction is terminated, otherwise the output

sequence is repeated. Note that if the B register contains 0 at the start of the execution of

this instruction, 256 bytes are output.

This instruction can be interrupted after each execution of the basic operation. The Program

Counter value at the start of this instruction is saved before the interrupt request is accepted,

so that the instruction can be properly resumed.

Flags: S: Cleared

Z: Set

H: Cleared

P: Set

N: Set if the most significant bit of the byte transferred was a 1; cleared otherwise

C: Cleared

Addressing Execute

Mode Syntax Instruction Format Time Note

OTDMR 11101101 10011011 2+r+o

1 2 ... 143 144 145 146 147 148 149 150 151 152 153 ... 267 268

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Zilog Z80380 Manual de usuario Pagina 148