Zilog Z8F0130 Manual de usuario descargar pdf (Pagina 19)

eZ8

™

CPU Core

User Manual

UM012820-0810 Architectural Overview

eZ8

™

CPU Control Registers

The eZ8 CPU contains four CPU control registers that are mapped into

the Register File address space. These four eZ8 CPU control registers are:

•

Stack Pointer High Byte

•

Stack Pointer Low Byte

•

Flags

The eZ8 CPU register bus can access up to 4K (4096) bytes of register

space. In all eZ8 CPU products, the upper 256 bytes are reserved for con-

trol of the eZ8 CPU, the on-chip peripherals, and the I/O ports. The eZ8

CPU control registers are always located at addresses from

FFCh to FFFh

as listed in Table 1.

Stack Pointer Registers

The eZ8 CPU allows you to relocate the stack within the Register File.

The stack can be located at addresses from

000h to EFFh. The 12-bit

Stack Pointer value is provided by

{SPH[3:0], SPL[7:0]}. The Stack

Pointer has a 12-bit increment/decrement capability for stack operations,

allowing the Stack Pointer to operate over more than one page 

Table 1. eZ8 CPU Control Registers

Mnemonic Register Description

Address

(Hex)

FLAGS Flags FFC

RP Register Pointer FFD

SPH Stack Pointer High Byte FFE

SPL Stack Pointer Low Byte FFF

1 2 ... 14 15 16 17 18 19 20 21 22 23 24 ... 313 314

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Zilog Z8F0130 Manual de usuario Pagina 19