Zilog Z8F0130 Manual de usuario descargar pdf (Pagina 261)

eZ8

™

CPU Core

User Manual

UM012820-0810 TM Instruction

246

ment resets the Z flag (because bit 7 in the destination operand is not a 0),

sets the S flag and clears the V flag:

TM R14, @R5



Object Code: 73 E5

If Register D4h contains the value 08h (00001000b), and Working Reg-

ister R0 contains the value 04h (00000100b) (testing bit 2 if it is 0), the

following statement sets the Z flag (because bit 2 in the destination oper

and is a 0) and clears the S and V flags:

D4h

, R0



Object Code: 74 E0 D4

If Register DFh contains the value 00h (00000000b), Register 07h con-

tains the value 1Fh, and Register 1Fh contains the value BDh

(

10111101b) (testing bits 7, 5, 4, 3, 2, and 0 if they are 0), the following

statement sets the Z flag (indicating the tested bits in the destination oper

and are 0) and clears the S and V flags:

DFh

, @

07h

Object Code: 75 07 DF

If Working Register R13 contains the value F1h (11110001b), the fol-

lowing statement tests bit 1 of the destination operand for 0, sets the Z

flag (indicating bit 1 in the destination operand is 0) and clears the S and

V flags:

TM R13, #02h



Object Code: 76 ED, 02

If Register 5Dh contains the value A0h, and Register A0h contains the

value

0Fh (00001111b), the following statement tests bit 4 of the Regis-

ter A0h for 0, sets the Z flag (indicating bit 4 in the destination operand

was 0) and clears the S and V flags:

TM @5D, #

10h

Object Code: 77 5D 10

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