
eZ8
™
CPU Core
User Manual
UM012820-0810 TCMX Instruction
242
TCMX
Definition
Test Complement Under Mask using Extended Addressing.
Syntax
TCMX dst, src
Operation
(NOT dst) AND src
Description
This new eZ8 extended addressing instruction tests selected bits in the
destination operand for a logical 1 value. Specify the bits to be tested by
setting a 1 bit in the corresponding bit position in the source operand (the
mask). The TCMX instruction complements the destination operand and
AND’s it with the source mask (operand). Check the Zero flag to deter
-
mine the result. If the Z flag is set, then the tested bits are 1. When a
TCMX operation is completed, the destination and source operands still
contain their original values.
Flags
C Unaffected
Z Set if the result is zero; reset otherwise
S Set if the result is negative; reset otherwise
V Reset to 0
D Unaffected
H Unaffected
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