Zilog Z80180 Manual de usuario descargar pdf (Pagina 269)

100

101

Z8018x

Family MPU User Manual

UM005003-0703

253

AND (IY+ d)

OR (IX + d)

OR (IY+d)

XOR (IX + d)

XOR (IY+d)

MC4

~MC6

TiTiTi * Z 1 1 1 1 1 1 1

CP (IX+d)

CP (IY+d)

MC6 T1T2T3 IX+d

IY+d

DATA 010 1 11 1

BIT b,g

MC1 T1T2T3 1st Op Code

Address

1st

Op Code

010 1 01 0

MC2 T1T2T3 2nd Op Code

Address

2nd

Op Code

010 1 01 1

BIT b, (HL)

MC1 T1T2T3 1st Op Code

Address

1st

Op Code

010 1 01 0

MC2 T1T2T3 2nd Op Code

Address

2nd

Op Code

010 1 01 1

MC3 T1T2T3HL DATA 010 1 11 1

BIT b, (IX+d)

BIT b, (IY+d)

MC1 T1T2T3 1st Op Code

Address

1st Op

Code

010 1 01 0

MC2 T1T2T3 2nd Op Code

Address

2nd Op

Code

010 1 01 1

MC3 T1T2T3 1st operand

Address

d 010 1 11 1

MC4 T1T2T3 3rd Op Code

Address

3rd Op

Code

010 1 01 1

MC5 T1T2T3 IX+ d

IY+d

DATA 010 1 11 1

Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)

Instruction

Machine

Cycle States Address Data RD WR MREQ IORQ M1 HALT ST

1 2 ... 264 265 266 267 268 269 270 271 272 273 274 ... 325 326

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